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HD66421 Datasheet, PDF (33/46 Pages) Hitachi Semiconductor – (RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD)
Preliminary
Rev. 1.1E '99.02.10
HD66421
Power Supply Circuits
HD66421 has following circuits for power supply
circuit: operational amplifiers, resistive dividers,
bias control circuit and contrast control circuit.
LCD driving voltage, VLCD, must be generated
externally.
LCD Drive Voltage Power Supply Levels: To
drive the LCD, a 6-level power supply are
necessary. These levels are generated internally or
supplied from outside. When an internal voltage
levels generator is chosen, external capacitors are
needed to stabilize these levels. AS the HD66421
incorporates operational amplifiers to these levels,
this circuit gives better quality of display with less
power consumption. This divided ratio is
programmable.
Bias current of internal operational amplifier is
determined with a resister which is inserted
between IREFM and GND. This resister value is
between 1MΩ and 5MΩ. Larger resister value
make less power consumption at internal
operational amplifier. However, too large value
loose operational margin of amplifiers.
Keep following relationship among voltage levels;
Contrast Control: Internal contrast control
circuit can change the output voltage level of
VLCD by setting data to contrast control register,
R16. VLCD adjustable range are showed below;
• 1/8 bias
0.73 * (VLCD-GND) ≤ VLCD ≤ 0.988 * (VLCD-GND)
• 1/9 bias
0.82 * (VLCD-GND) ≤ VLCD ≤ 0.993 * (VLCD-GND)
(Example 1.)
• 1/11 bias
0.79 * (VLCD-GND) ≤ VLCD ≤ 0.992 * (VLCD-GND)
• Partial Display
0.82 * (Vcc-GND) ≤ VCC ≤ 0.997 * (VCC-GND)
(Example 2.)
Partail display function uses 1/4 bias ratio from
VCC to GND. 8 levels of contrast can be selected
with data bit 2 to 0 of R16.
Vcc ≥ IREFMP > IREFM ≥ GND
VLCD > Vcc > GREF ≥ GND
VLCD ≥ V1O ≥ V2O ≥ V3O ≥ V4O ≥ V5O ≥ GREF≥ GND
VLCD-Vcc ≥ 1.0V
IREFP-IREFM ≥ 1.0V
Vcc-GREF ≥ 1.0V
Example.1 LCD bias level
1/80 duty Display(1/9 bias, VLCD=12V,GND=0V)
12
VLCD
11
V1O
10
9
8
7
6
5
4
3
2
1
0
0
V2O
V3O
V4O
V5O
7
F
17
1F
Contrast (R16)
(maximum)
Example 2. LCD bias level
Partial Display(1/4 bias,VCC=5V,GND=0V)
5
VCC
V1O
4
V2O
V3O
3
V4O
2
V5O
1
0
0
4
7
Contrast (R16)
(maximum)
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