HD66421 Datasheet, PDF (12/46 Pages) Hitachi Semiconductor – (RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD)

Preliminary
Rev. 1.1E '99.02.10
HD66421
MPU Interface
The HD66421 can interface directly to an MPU
through an 8-bit data bus or through an I/O port
(figure 2). The MPU can access the HD66421
internal registers independently of internal clock
timing.
The index register can be directly accessed but the
other registers (data registers) cannot. Before
accessing a data register, its register number must
be written to the index register. Once written, the
register number is held until it is rewritten,
enabling the same register to be consecutively
accessed without having to rewrite to the register
number for each access. An example of a register
access sequence is shown in figure 3.
A15 - A0
Z80
A0
RD
WR
D0 - D7
decoder
8
CS
RS
RD ^HD66421
WR
DB0 - DB7
a) Interface through Bus
C0
C1
H8/325
C2
C3
8
A0 - A7
CS
RS
RD _HD66421
WR
DB0 - DB7
b) Interface through I/O Port
Figure 2 8-Bit MPU Interface Examples
CS
RS
WR
RD
DB7 to
DB0
Data
Data
Data
Write index
register
Write data
register
Write data
register
Data
Data
Data
Write index
register
Read data
register
Read data
register
Figure 3 8-Bit Data Transfer Sequence
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