HD66421 Datasheet, PDF (14/46 Pages) Hitachi Semiconductor – (RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD)

Preliminary
Rev. 1.1E '99.02.10
HD66421
Column Address Inversion According to LCD
Driver Layout: The HD66421 can always
display data in address H'0 on the top left of an
LCD panel regardless of where it is positioned
with respect to the panel. This is because the
HD66421 can invert the positional relationship
between display RAM addresses and LCD driver
output pins by inverting RAM addresses.
Specifically, the HD66421 outputs data in
address H'0 from SEG1 when the ADC bit in
control register 1 is 0, and from SEG160
otherwise. Here. the scan direction of row output
is also inverted according to the situation. as
shown in figure 6. Note that addresses and scan
direction are inverted when data is written to the
display RAM, and thus changing the ADC bit
after data has been written has no effect.
Therefore. hardware control bits such as ADC
must be set immediately after reset is canceled,
and must not be set while data is being displayed.
COM1
COM50
LCD panel
COM100
HD66421
H'0 H'1
COM51
COM51
H'0 H'1
HD66421
COM100
LCD panel
COM50
COM1
a) ADC = 0
b) ADC = 1
Figure 5 LCD Driver Layout and RAM addresses : 1/100 Duty cycle
Table 1 Scanning Direction and RAM Address
DTY1 DTY0
0
0
0
1
1
0
1
1
ADC
0
1
0
1
0
1
0
1
COMMON
SEGMENT
COM1 –> COM50, COM100 –> COM51 H'00 –> SEG1
COM51 –> COM100, COM50 –> COM1 H'00 –> SEG160
COM1 –> COM40, COM100 –> COM61 H'00 –> SEG1
COM61 –> COM100, COM40 –> COM1 H'00 –> SEG160
COM1 –> COM32, COM100 –> COM69 H'00 –> SEG1
COM69–> COM100, COM32 –> COM1 H'00 –> SEG160
8 COM depend on R11
H'00 –> SEG1
8 COM depend on R11
H'00 –> SEG160
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