GS8324Z18B Datasheet, PDF (9/46 Pages) GSI Technology – 2M x 18, 1M x 36, 512K x 72 36Mb Sync NBT SRAMs

Preliminary
GS8324Z18(B/C)/GS8324Z36(B/C)/GS8324Z72(C)
GS8324Z18/36 119-Bump BGA Pin Description
Pin Location
P4, N4
R2, C3, B3, C2, A2, A3, A5, A6, T3,
T5, R6, C5, B5, C6, G4, A4
T4, T6
T2
T2, T6, T4
K7, L7, N7, P7, K6, L6, M6, N6
H7, G7, E7, D7, H6, G6, F6, E6
H1, G1, E1, D1, H2, G2, F2, E2
K1, L1, N1, P1, K2, L2, M2, N2
P6, D6, D2, P2
L5, G5, G3, L3
P7, N6, L6, K7, H6, G7, F6, E7, D6
D1, E2, G2, H1, K2, L1, M2, N1, P2
L5, G3
B1, C1, R1, T1, U6, B7, C7, J3, J5
P6, N7, M6, L7, K6, H7, G6, E6, D7,
D2, E1, F2, G1, H2, K1, L2, N2, P1,
G5, L3
L4
K4
M4
H4
E4
B6
B2
F4
B4
T7
R5
R3
Symbol
A0, A1
An
An
NC
An
DQA1–DQA8
DQB1–DQB8
DQC1–DQC8
DQD1–DQD8
DQA9, DQB9,
DQC9, DQD9
BA, BB, BC, BD
DQA1–DQA9
DQB1–DQB9
BA, BB
NC
NC
NC
CK
CKE
W
E1
E3
E2
G
ADV
ZZ
FT
LBO
Type
I
I
—
I
I/O
I/O
I
I/O
I
—
—
—
I
I
I
I
I
I
I
I
I
I
I
D4
ZQ
I
R7
PE
I
U2
TMS
I
U3
TDI
I
Description
Address field LSBs and Address Counter Preset Inputs
Address Inputs
Address Input (x36 Version)
No Connect (x36 Version)
Address Input (x18 Version)
Data Input and Output pins. (x36 Version)
Data Input and Output pins. (x36 Version)
Byte Write Enable for DQA, DQB, DQC, DQD I/Os; active low (x36 Version)
Data Input and Output pins (x18 Version)
Byte Write Enable for DQA, DQB I/Os; active low (x18 Version)
No Connect
No Connect (x18 Version)
No Connect (x36 Version)
Clock Input Signal; active high
Clock Enable; active low
Write Enable; active low
Chip Enable; active low
Chip Enable; active low (x36 version)
Chip Enable; active high (x36 version)
Output Enable; active low
Burst address counter advance enable
Sleep mode control; active high
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
FLXDrive Output Impedance Control (Low = Low Impedance [High Drive],
High = High Impedance [Low Drive])
Parity Bit Enable; active low
Scan Test Mode Select
Scan Test Data In
Rev: 1.00 10/2001
9/46
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.