GS8324Z18B Datasheet, PDF (23/46 Pages) GSI Technology – 2M x 18, 1M x 36, 512K x 72 36Mb Sync NBT SRAMs

Preliminary
GS8324Z18(B/C)/GS8324Z36(B/C)/GS8324Z72(C)
Sleep mode is dictated by the length of time the ZZ is in a High state. After entering Sleep mode, all inputs except ZZ become
disabled and all outputs go to High-Z The ZZ pin is an asynchronous, active high input that causes the device to enter Sleep mode.
When the ZZ pin is driven high, I_SB2 is guaranteed after the time tZZI is met. Because ZZ is an asynchronous input, pending
operations or operations in progress may not be properly completed if ZZ is asserted. Therefore, Sleep mode must not be initiated
until valid pending operations are completed. Similarly, when exiting Sleep mode during tZZR, only a Deselect or Read commands
may be applied while the SRAM is recovering from Sleep mode.
Sleep Mode Timing Diagram
CK
ZZ
tZZR
Sleep
tZZS
tZZH
Designing for Compatibility
The GSI NBT SRAMs offer users a configurable selection between Flow Through mode and Pipeline mode via the FT signal
found on . Not all vendors offer this option, however most mark as V_DD or V_DDQ on pipelined parts and V_SS on flow through
parts. GSI NBT SRAMs are fully compatible with these sockets.
Absolute Maximum Ratings
(All voltages reference to V_SS)
Symbol
Description
Value
Unit
V_DD
V_DDQ
V_CK
V_I/O
V_IN
I_IN
I_OUT
P_D
T_STG
T_BIAS
Voltage on V_DD Pins
Voltage in V_DDQ Pins
Voltage on Clock Input Pin
Voltage on I/O Pins
Voltage on Other Input Pins
Input Current on Any Pin
Output Current on Any I/O Pin
Package Power Dissipation
Storage Temperature
Temperature Under Bias
–0.5 to 4.6
V
–0.5 to 4.6
V
–0.5 to 6
V
–0.5 to V_DDQ +0.5 (≤ 4.6 V max.)
V
–0.5 to V_DD +0.5 (≤ 4.6 V max.)
V
+/–20
mA
+/–20
mA
1.5
W
–55 to 125
o_C
–55 to 125
o_C
Note:
Permanent damage to the device may occur if the Absolute Maximum Ratings are exceeded. Operation should be restricted to Recommended
Operating Conditions. Exposure to conditions exceeding the Absolute Maximum Ratings, for an extended period of time, may affect reliability of
this component.
Rev: 1.00 10/2001
23/46
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.