GS4576C09 Datasheet, PDF(8/62 Page) GSI Technology – 64M x 9, 32M x 18, 16M x 36 576Mb CIO Low Latency DRAM (LLDRAM II)

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GS4576C09 Datasheet, PDF (8/62 Pages) GSI Technology – 64M x 9, 32M x 18, 16M x 36 576Mb CIO Low Latency DRAM (LLDRAM II)

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PowerâUp Initialization Sequence

GS4576C09/18/36L

VEXT

VDD

VDDQ

VREF

VTT

tCK

tCKH

tCKL

tDKL

tDK

tDKH

Command

NOP

200us Min

NOP

Mode Initialization

MRS

tMRSC

Refresh 1024 Cycles NOP Cycles Min

All Banks(5)

NOP

AREF

NOP

ADDR

CODE(1,2) CODE(1,2)

CODE(2)

ADDR

Bank 0

Bank 7

Valid

Notes:

1. Recommend all address pins held Low during dummy MRS commands.

2. A10âA17 must be Low.

3. DLL must be reset if tCK or VDD are changed.

4. CK and CK must be separated at all times to prevent bogus commands from being issued.

5. The sequence of the eight AUTO REFRESH commands (with respect to the 1024 NOP commands) does not matter. As is required for any operation,

tRC must be met between an AUTO REFRESH command and a subsequent VALID command to the same bank.

Rev: 1.04 11/2013

8/62

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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