GS832418B Datasheet, PDF (26/46 Pages) GSI Technology – 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs

Flow Through Read Cycle Timing
Preliminary
GS832418(B/C)/GS832436(B/C)/GS832472(C)
CK
ADSP
ADSC
ADV
A0–An
GW
BW
BA–BD
Single Read
tS tH
tKH
Burst Read
tKL
tKC ^{ADSP is blocked by E inactive}
tS tH
ADSC initiated read
tS tH
Suspend Burst
Suspend Burst
tS tH
RD1
RD2
tS
RD3
tH
tS
tH
tS tH
E1
tOE ^tOHZ
G
DQA–DQD
tOLZ
Q1A
Hi-Z
tLZ
tKQ
E1 masks ADSP
tKQX
Q2A Q2B
Q2c
Q2D
tKQX
Q3A
tHZ
Rev: 1.00 10/2001
26/46
© 2001, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.