MB81EDS516545 Datasheet, PDF (58/60 Pages) Fujitsu Component Limited. – MEMORY Consumer FCRAM CMOS 512M Bit (4 bank x 2M word x 64 bit) Consumer Applications Specific Memory for SiP

MB81EDS516545
(22) Background Refresh Entry and Exit *¹ (Assuming BL = 8)
CK
CK
CKE H
CS
RAS
CAS
WE
BA
0
2
0
1
2
AP
RA
Address
RA
RC^*2
CA
CA
RA
SA
DM
RDQS ^L
WDQS
DQ
D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D6 D7
tRRD
tRCD
*3
*3
tREFC
MACT *³
BREF
Bank 0 & 1 Bank 2 & 3
WRIT *³
Bank 0
WRIT *³
Bank 1
BREFX
Bank 2 & 3
MACT
Bank 2 & 3
Don’t care
*1: RA = Row Address, BA = Bank Address, CA = Column Address, AP = Auto Precharge
*2: Refresh Count (RC) must be set through A[9:0] together with BREF command.
*3: Icf _{oMmAmCaTncdotmo} mBaannkd _1is. issued to Bank 0, 1st WRIT command must be issued to Bank 0 followed by 2nd WRIT
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DS05-11463-1E