MB81EDS516545 Datasheet, PDF (26/60 Pages) Fujitsu Component Limited. – MEMORY Consumer FCRAM CMOS 512M Bit (4 bank x 2M word x 64 bit) Consumer Applications Specific Memory for SiP

MB81EDS516545
9. PRECHARGE SINGLE BANK (PRE)
PRECHARGE SINGLE BANK (PRE) command starts precharge operation for a bank selected by BA. A selected
bank will be in IDLE state after specified time duration of tRP from PRE command. A10 determines whether one
or all banks are precharged. If AP(A10) = L, a bank to be selected by BA is precharged.
10. PRECHARGE ALL BANK (PALL)
PRECHARGE ALL BANKS (PALL) command starts precharge operation for all banks. All banks will be in IDLE
state after specified time duration of tRP from PALL command. A10 determines whether one or all banks are
precharged. If AP(A10) = H, all banks are precharged and BA input is a “don't care”.
11. AUTO REFRESH (REF)
AUTO REFRESH (REF) command starts internal refresh operation which uses the internal refresh address
counter. All banks must be precharged prior to the Auto-refresh command. Data retention capability depends
on the Junction Temperature (Tj). Total 8,192 AUTO REFRESH (REF) commands must be asserted within the
following refresh period of tREF.
Tj Max ( °C)
+ 105
tREF (ms)
64
+ 125
16.7
12. SELF-REFRESH ENTRY (SELF)
SELF REFRESH ENTRY (SELF) commands can be issued by AUTO REFRESH (REF) command in conjunction
with CKE = Low after last read data has been appeared on DQ. During Self Refresh mode, stored data can be
retained without external clocking and all inputs except for CKE will be a “don't care”. Self refresh mode can be
used when Tj is less than + 85°C. Auto Refresh must be issued to retain data when Tj is greater than + 85 °C.
13. SELF-REFRESH EXIT (SELFX)
To exit self-refresh mode, apply minimum tIS after CKE brought High, and then the NO OPERATION command
(NOP) or the DESELECT command (DESL) should be asserted within one tREFC period. CKE should be held
High within one tREFC period after tIS. Refer to the “(15) Self Refresh Entry and Exit” in “■TIMING DIAGRAMS”
for the detail. It is recommended to assert an Auto-refresh command just after the tREFC period to avoid the
violation of refresh period.
14. MODE REGISTER SET (MRS)
MODE REGISTER SET (MRS) commands to program the mode registers. Once a mode register is programmed,
the contents of the register will be held until re-programmed by another MRS command. MRS command should
only be issued on conditions that all DQs are in High-Z and all banks are in IDLE state. The contents of the mode
registers is undefined after the power-up and Deep Power Down Exit. Therefore MRS must be issued to set
each content of mode registers after initialization. Refer to the “Power Up Initialization” in “ ■FUNCTIONAL
DESCRIPTION”.
15. POWER DOWN ENTRY (PD)
POWER DOWN ENTRY (PD) commands to drive the device in Power Down mode and maintains low power
state as long as CKE is kept Low. During Power Down state, all inputs signals are a “don't care” except for CKE.
Power Down mode must be entered on condition that all DQs are in High-Z.
16. POWER DOWN EXIT (PDX)
POWER DOWN EXIT (PDX) commands to resume the device from Power Down mode. Any commands can be
detected 1 clock after PDX commands.
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DS05-11463-1E