MB86391 Datasheet, PDF (37/69 Pages) Fujitsu Component Limited. – MPEG2 1chip Audio/Video Encoder

FUJITSU LIMITED
Proprietary and Confidential
3.3 SDRAM Interface for Video Encoding
The SDRAM interface for video encoding controls access to an external SDRAM that the video encoder built
into this LSI uses to encode video input data.
Connect either two 16Mbit (512K×16bit×2bank configuration) SDRAMs or one 64Mbit (512K×32bit×4bank
configuration) SDRAM. Fig. 3.3 shows an example 64Mbit SDRAM connection.
64Mbit SDRAM
(MB81F643242B and others)
BA0
BA1, A10:0
DQ31:0
DQM3:0
WE
CAS
RAS
CS
CKE
CLK
‘Fixed to H’ or ‘L’
MB86391
SDADRS11:0
SDDATA31:0
SDDQM
XSDWE
XSDCAS
XSDRAS
XSDCS
SDCKE
SDCLK
Video encoding
SDRAM
interface
Note: Install the MB86391 and the SDRAM as physically close as possible.
Pull up the SDCLK signal line with a resistance of 200Ω in the vicinity of the SDRAM. The
SDCLK signal line must be in a pattern of a single stroke, from the MB86391, the sending
end, through the SDRAM CLK to the point of connection to the pull−up resistance.
Other signal lines do not require any particular handling such as pull−up. However, take
care to avoid unnecessary routing when designing patterns.
Fig. 3.3: Example video encoding SDRAM interface connection
MB86391
Product Specification
Rev. 1.1
12, November 2001
33