MB86330 Datasheet, PDF (35/46 Pages) Fujitsu Component Limited. – 16-bit Fixed-point DSP

MB86330
s PLL
1. PLL operation
Performing this DSP operation using PLL requires satisfaction of the following operation.
When using PLL, set the PSTOP pin at “H” for 1 µsec or more for a reset, then at “L”, and wait for lockup time
or more time.
(1) Take enough time for MCLK input and for lockup at the PLL operation state with PSTOP equal to "L".
(2) Hold the DSP reset state until PLL is locked. (XRST = “L”)
(3) When PLL is locked, the “L” pin goes “H”.
(4) After PLL has been locked, change XRST from “L” to “H” to start DSP operation.
VDD
MCLK
PSTOP
L
XRST
lock up time
Initial time ( µs)
2. PLL standards
Input clock (MHz)
20 to 25
Look up time (µs)
200
Remarks
When PLL is used
35