MB86330 Datasheet, PDF (12/46 Pages) Fujitsu Component Limited. – 16-bit Fixed-point DSP

MB86330
s DESCRIPTION OF BLOCK FUNCTIONS
• Clock generator (CLOCK Gen.)
Generates a clock required for the DSP to control a system clock stop in the waste state and an entire clock
stop for sleeping.
• Interrupt controller
Controls an INT interrupt, an overflow interrupt, and a DMA interrupt.
• Controller
Generates a program address and decodes an instruction to control the entire DSP.
• Address generator
Generates an address required for memory access. It supports a circular addressing function to control the
DMA access pointer and the stack pointer.
• Data operation section
Performs data operations such as product addition, arithmetic operations (multiplication, division, addition and
subtraction), logic operations, and shift operations.
• Bus interface
Controls access to the memory space including instruction reading, data memory access and mapped I/O
access.
• ARAM/BRAM
This is a data memory for data operations. A and B use different banks, enabling double transfer without a
wait. (ARAM = 4 kwords, BRAM = 4 kwords)
• TRAM (Table data memory)
Sets table data required for applications.
• Instruction memory
Sets program data.
• Mapped I/O
Supports a macro valid for applications
Serial I/O: Two serial ports for transmitting CODEC data.
One serial input 1 system for setting operating mode (SMODE)
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