MB86330 Datasheet, PDF (31/46 Pages) Fujitsu Component Limited. – 16-bit Fixed-point DSP

MB86330
Mnemonic
Operation overview
N
MUL
Signed multiplication
A0, A1, B0, B1, C0, C1,
D0, D1/CX, DX
MUL
Signed multiplication with
duplicate transfer
acc ← A0 × A1
A0 ← (AD0), A1 ← (AD1)
acc ← B0 × B1
B0 ← (AD0), B1 ← (AD1)
MUL
Signed multiplication with
transfer
acc ← (A0 or A1) × A1
reg ↔ (AD1)
MULS
Signed and unsigned
multiplication
A0, A1, B0, B1, C0, C1,
D0, D1/CX, DX
MULS
Signed and unsigned
multiplication with duplicate
transfer
acc ← A0 × A1
A0 ← (AD0), A1 ← (AD1)
acc ← B0 × B1
B0 ← (AD0), B1 ← (AD1)
MULU
Signed and unsigned
multiplication
A0, A1, B0, B1, C0, C1,
D0, D1/CX, DX
MULU
Signed and unsigned
multiplication with duplicate
transfer
acc ← A0 × A1
A0 ← (AD0), A1 ← (AD1)
acc ← B0 × B1
B0 ← (AD0), B1 ← (AD1)
MVCC
Conditional transfer
Inter-register transfer
–
REG ↔ REG
NOT
Logical NOT
A0, A1, B0, B1, C0, C1,
D0, D1
NEG
2’s complement operation
A0, A1, B0, B1, C0, C1,
D0, D1, AX, BX, CX, DX
NOP
None executed
–
OR
Logical OR
A0, A1, B0, B1, C0, C1,
D0, D1
ST
↑
POP
Return of a register from the
–
stack
PUSH Saving of a register to the
–
stack
REGU Auxiliary normalization
CX, DX
–
operation
REP
Repeated execution of the
RPC/imm 10
–
subsequent instruction
REP2 Repeated execution of the
RPC2/imm 10
–
subsequent instruction
RET
Return from a subroutine
–
RET1 Return from an interrupt
–
routine
Flag change
Z C V1 V2 V3
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↑
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↑↑↑↑↑
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(Continued)
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