MB86330 Datasheet, PDF (28/46 Pages) Fujitsu Component Limited. – 16-bit Fixed-point DSP

MB86330
s INTERRUPT
A software interrupt and a hardware interrupt are available. Interrupts are assigned specified types of priority.
When interrupts occur concurrently, an interrupt with higher priority is executed earlier.
Priority
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Soft/hard
Hard
Hard
Soft
Soft
Hard
Interrupt type
RST
BREAK
TRAP
V1
V3
DMA0
DMA1
DMA2
DMA3
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
Interrupt branch
destination
0XFFFE
0X0002*
0XFFFC
0XFFFA
—
—
—
—
0XFFF8
0XFFF6
0XFFF4
0XFFF2
0XFFF0
0XFFEE
0XFFEC
0XFFEA
Cause of an interrupt
Hardware reset
External reset signal input
Setup of emulator operation mode
External break signal input
Setup of emulator operation mode
Software (TRAP instruction)
Occurrence of arithmetic operation overflow (V1)
Occurrence of arithmetic operation overflow (V3)
DMA0 signal input (for data input)
DMA1 signal input (for data input)
DMA2 signal input (for data output)
DMA3 signal input (for data output)
SDOME interrupt signal input
External interrupt signal input (INT1)
External interrupt signal input (INT2)
External interrupt signal input (INT3)
External interrupt signal input (INT4)
External interrupt signal input (INT5)
External interrupt signal input (INT6)
External interrupt signal input (INT7)
* : Memory space for a debug instruction
Notes: • Emulator operation mode is set by a hardware interrupt resulting from external break signal input and
by a software interrupt by the TRAP instruction.
• Any interrupts other than a reset are disabled during downloading.
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