MB86330 Datasheet, PDF (18/46 Pages) Fujitsu Component Limited. – 16-bit Fixed-point DSP

MB86330
s REGISTERS
• Data registers (A0, A1, B0 and B1)
Each of the data registers consists of four words (16 bits). They can be used as four word-length registers (16
bits) and two long-word registers (32 bits) to execute various arithmetic operation instructions, logic operation
instructions, and transfer instructions.
• Accumulators (C0 to C1, and D0 to D2)
The accumulators can be linked as two 40-bit registers (CX and DX) to execute various arithmetic operation
instructions, logic operation instructions, and transfer instructions. The 40-bit length registers (CX and DX)
can be specified as destinations for product addition instructions. Four 16-bit length accumulators (C0, C1,
D0 and D1), and two 8-bit length accumulators (C2 and D2) are supported.
• Address registers (X0 to X7)
Eight 16-bit address registers are supported. An address register is used to specify an operand address for
transfer. Immediate values (1 to –2) or the address update registers (Y0 and Y1) can be used to update address
registers. They can also be updated automatically by transfer.
• Address update registers (Y0 and Y1)
Two 16-bit address update registers are supported. The address update registers are used to update address
registers during addressing.
• Base pointer (BP)
The base pointer consists of 16 bits. The contents of the base pointer plus a 7-bit immediate value are generated
as the address value during direct 7-bit length addressing.
• Circular register (BV)
The circular register, which consists of 16 bits, provides an offset value for circular addressing.
• Modulo register (MD)
The modulo register, which consists of 16 bits, is used to specify an addressing range for circular addressing.
• Repeat counter (RPC)
The repeat counter, which consists of 16 bits, is used to specify the number of times the REP/DO instruction
is repeated. During execution of the repeat instruction, the repeat counter is decremented by one every repeat
operation cycle.
• Repeat counter 2 (RPC2)
Repeat counter 2, which consists of 16 bits, is used to specify the number of times the REP2 instruction is
repeated. During execution of the repeat 2 instruction, repeat counter 2 is decremented by one every repeat
operation cycle.
• DO address registers (DOSTR and DOEND)
These registers maintain a loop start address (DOSTR)/end address (DOEND) for the DO instruction. They
can process only PUSH/POP.
• Loop counters (LC0 and LC1)
Each of the loop counters consists of 16 bits. They store the number of times repetition is made in a specified
address range.
(Continued)
18