MB82DBS08164C-70L Datasheet, PDF (23/58 Pages) Fujitsu Component Limited. – 128 M Bit (8 M word×16 bit) Mobile Phone Application Specific Memory

MB82DBS08164C-70L
(6) Synchronous Write Operation (Burst Mode)
(At recommended operating conditions unless otherwise noted)
Parameter
Symbol
Value
Min
Max
Unit Notes
Burst Write Cycle Time
tWCB
⎯
8000
ns
Data Setup Time to CLK
tDSCK
3
⎯
ns
Data Hold Time from CLK
tDHCK
1
⎯
ns
WE Low Setup Time to 1st Data Input
tWLD
45
⎯
ns
WE Setup Time to CLK
tWSCK
3
⎯
ns
WE Hold Time from CLK
tCKWH
1
⎯
ns
LB, UB Setup Time to CLK
tBSCK
3
⎯
ns *1
LB, UB Hold Time from CLK
tCKBH
1
⎯
ns *1
CE1 Low to WAIT High
tCLTH
5
15
ns *2
WE Low to WAIT High
tWLTH
5
15
ns *2
CE1 High to WAIT High-Z
tCHTZ
⎯
9.5
ns *2
WE High to WAIT High-Z
tWHTZ
⎯
9.5
ns *2
Burst End CE1 Low Hold Time from CLK
tCKCLH
1
⎯
ns
Burst End CE1 High Setup Time to next CLK
tCHCK
3
⎯
ns
CE1 High Pulse Width
tCP
9.5
⎯
ns
Burst Terminate
Recovery Time
BL = 8, 16
BL = Continuous
9.5
tTRB
70
⎯
ns *3
⎯
ns *3
*1 : tBSCK and tCKBH should be satisfied for byte mask control.
*2 : The output load 50 pF with 50 Ω termination to VDD × 0.5 V.
*3 : Defined from the Low to High transition of CE1 to the High to Low transition of either ADV or CE1 whichever
occurs late for the next access.
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