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MB82DBS08164C-70L Datasheet, PDF (11/58 Pages) Fujitsu Component Limited. – 128 M Bit (8 M word×16 bit) Mobile Phone Application Specific Memory
MB82DBS08164C-70L
• Burst Read Operation
CLK
Address
ADV
CE1
Valid address
OE
High
WE
RL
DQ
High-Z
WAIT
High-Z
Q1
Q2
QBL
BL
• Burst Write Operation
CLK
Address
Valid address
ADV
CE1
OE
High
WE
RL-1
DQ
High-Z
WAIT
High-Z
D1
D2
DBL
BL
• CLK Input Function
The CLK is input signal to synchronize the memory to the microcontroller or system bus frequency during
synchronous burst read & write operation. The CLK input increments the device internal address counter and
the valid edge of CLK is referred for latency counts from address latch, burst write data latch, and the burst read
data output. During synchronous operation mode, CLK input must be supplied except for standby state and
power down state. CLK is a “don't care” during asynchronous operation.
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