MC68181 Datasheet, PDF (96/119 Pages) Freescale Semiconductor, Inc – Advance Information ROAMING FLEX chip SIGNAL PROCESSOR

MC68181
Freescale Semiconductor, Inc.
Decoder-to-Host Packet Descriptions
Table B-39 Short Instruction Vector Definition
i₂i₁i₀ d₁₀ d₉ d₈ d₇ d₆ d₅ d₄ d₃ d₂ d₁ d₀
Description
110
Reserved
111
Reserved for test
Note:
1. Assigned temporary address (a) and assigned frame (f). See Appendix C for additional
information.
2. i = Instruction type—These bits define the meaning of the d bits in this packet.
x = Unused bits—The value of these bits is not guaranteed.
Message Packet
The Message Field follows the Vector Field in the FLEX protocol. It contains the
message data, checksum information, and may contain fragment numbers and
message numbers. See Appendix A for additional information. If the error bit of a
vector word is not set and the vector word indicates that there are message words
associated with the page, the message words are sent in Message Packets. The ID of
the Message Packet is the word number where the message word was received in the
frame.
Table B-40 Message Packet Bit Assignments
Byte
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
3
0
WN6 WN5 WN4 WN3 WN2 WN1 WN0
2
e
p₁
p₀
i₂₀
i₁₉
i₁₈
i₁₇
i₁₆
1
i₁₅
i₁₄
i₁₃
i₁₂
i₁₁
i₁₀
i₉
i₈
0
i₇
i₆
i₅
i₄
i₃
i₂
i₁
i₀
Note:
WN = Word number of message word (3–87 decimal)—Describes the location of the message word in
the frame
e is set if more than 2 bit errors are detected in the word.
p = Phase on which the message word was found (0 = a, 1 = b, 2 = c, 3 = d)
i = information bits of the message word—The definitions of these bits depend on the vector type and
which word of the message is being received. See Appendix A for a detailed description of these
bits.
B-36
MC68181 Technical Data Sheet
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