MC68181 Datasheet, PDF (71/119 Pages) Freescale Semiconductor, Inc – Advance Information ROAMING FLEX chip SIGNAL PROCESSOR

Freescale Semiconductor, Inc.
MC68181
Host-to-Decoder Packet Descriptions
Control Packet
The Control Packet defines a number of different control bits for the FLEX chip IC.
The ID of the Control Packet is 2.
Table B-7 Control Packet Bit Assignments
Byte
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
3
0
0
0
0
0
0
1
0
2
FF₇
FF₆
FF₅
FF₄
FF₃
FF₂
FF₁
FF₀
1
0
SPM
PS₁
PS₀
0
0
0
0
0
0
SBI
0
MTC
0
0
EAE
ON
FORCE FRAME (FF) 0–7
These bits enable and disable forcing the FLEX chip IC to look in frames 0 through 7.
When an FF bit is set, the FLEX chip IC will decode the corresponding frame. Unlike
the AF bits in the Frame Assignment Packets, the system collapse of a FLEX system
will not affect frames assigned using the FF bits. (Where as setting AF₀ to 1 when the
system collapse is 5 will cause the decoder to decode frames 0, 32, 64, and 96, setting
FF₀ to 1 when the system collapse is 5 will only cause the decoder to decode frame 0.)
This may be useful for acquiring transmitted time information or channel attributes
(e.g. Local ID). The value after reset = 0.
SINGLE PHASE MODE (SPM)
When this bit is set, the FLEX chip IC will decode only one phase of the transmitted
data. When this bit is clear, the FLEX chip IC will decode all of the phases it receives.
A change to this bit while the FLEX chip IC is on, will not take affect until the next
block 0 of the next decoded frame. The value after reset = 0.
PHASE SELECT (PS)
When the SPM bit is set, these bits define what phase the FLEX chip IC should decode
according to the following table. This value is determined by the service provider. A
change to these bits while the FLEX chip IC is on, will not take affect until the next
block 0 of a frame. The value after reset = 0.
MOTOROLA
MC68181 Technical Data Sheet
For More Information On This Product,
Go to: www.freescale.com
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