MC68181 Datasheet, PDF (33/119 Pages) Freescale Semiconductor, Inc – Advance Information ROAMING FLEX chip SIGNAL PROCESSOR

Freescale Semiconductor, Inc.
MC68181
FLEX Frame Structure
The 6400 bps rate is transmitted as four concurrent phases of information (A,B, C, and
D), as shown in Figure A-4, at 3200 symbols per second using 4-level FSK
modulation.
One Cycle = 4 Minutes
Frame Frame Frame Frame Frame Frame
127
0
1
2
3
4
Frame Frame Frame
125 126 127
One Frame = 1.875 s.
Sync 1 ^Frame Sync 2
Info
Block 0
Word Number
0 to 7
One Block =
160 ms
Block 9
Word Number
72 to 79
Block 10
Word Number
80 to 87
PHASE A
PHASE B
PHASE C
PHASE D
BIW
Address
Field
Vector
Field
Message Field Idle Field
BIW
Address
Field
BIW
Address
Field
Vector
Field
BIW
Address
Field
Vector
Field
Message Field Idle Field
Message Field
Idle
Field
Vector
Field
Message Field
Figure A-4 FLEX™ Signal Structure For 6400 BPS
AA1229
Frame Data Portion
As noted above, there are eleven data blocks following the frame synchronization
portion of each frame. Each block has eight interleaved words per phase, numbered
0–87 contiguously for all eleven blocks, in every frame. Each word has information
that allows for bit error correction and detection contained within an error correcting
code.
Each of the eighty-eight words in each phase is organized into the following five
fields:
MOTOROLA
MC68181 Technical Data Sheet
A-5
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