MC68181 Datasheet, PDF (14/119 Pages) Freescale Semiconductor, Inc – Advance Information ROAMING FLEX chip SIGNAL PROCESSOR

MC68181
Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI) Timing
SERIAL PERIPHERAL INTERFACE (SPI) TIMING
(V_DD = 1.8 to 3.6 V, T_A = –30 to +85°C)
Table 2-6 SPI Timing
Characteristic
Conditions
Symbol Min Max Unit
Operating Frequency
—
f_OP
0
1
MHz
Cycle Time
—
t_CYC
1000 —
ns
Select Lead Time
—
t_LEAD1
200
—
ns
De-select Lag Time
—
t_LAG1
200
—
ns
Select-to-Ready Time Previous packet did not program an
t_RDY
—
80
µs
address word; C_L = 50 pf
Select-to-Ready Time
Previous packet programmed an
address word; C_L = 50 pf
t_RDY
—
420
µs
Ready High Time
—
t_RH
50
—
µs
Ready Lead Time
—
t_LEAD2
200
—
ns
Not Ready Lag Time
C_L = 50pf
t_LAG2
—
200
ns
MOSI Data Setup Time
—
t_SU
200
—
ns
MOSI Data Hold Time
—
t_HI
200
—
ns
MISO Access Time
C_L = 50pf
t_AC
0
200
ns
MISO Disable Time
—
t_DIS
—
300
ns
MISO Data Valid Time
C_L = 50pf
t_V
—
200
ns
MISO Data Hold Time
—
t_HO
0
—
ns
SS High Time
—
t_SSH
200
—
ns
SCK High Time
—
t_SCKH
300
—
ns
SCK Low Time
—
t_SCKL
300
—
ns
SCK Rise Time
20% to 70% V_DD
t_R
1
µs
SCK Fall Time
20% to 70% V_DD
t_F
1
µs
Note: When the host reprograms an address word with a Host-to-FLEX™ chip packet ID > 127 (decimal), there
may be an added delay before FLEX™ chip is ready for another packet.
2-6
MC68181 Technical Data Sheet
MOTOROLA
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