|
MC9S12E128 Datasheet, PDF (93/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers | |||
|
◁ |
Chapter 2 128 Kbyte Flash Module (FTS128K1V1)
2.3.2.4 Flash Conï¬guration Register (FCNFG)
The FCNFG register enables the Flash interrupts and gates the security backdoor key writes.
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
0
0
0
0
0
CBEIE
CCIE
KEYACC
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-7. Flash Conï¬guration Register (FCNFG)
CBEIE, CCIE, and KEYACC are readable and writable while remaining bits read 0 and are not writable.
KEYACC is only writable if the KEYEN bit in the FSEC register is set to the enabled state (see Section
2.3.2.2).
Table 2-7. FCNFG Field Descriptions
Field
7
CBEIE
6
CCIE
5
KEYACC
Description
Command Buffer Empty Interrupt Enable â The CBEIE bit enables the interrupts in case of an empty
command buffer in the Flash module.
0 Command Buffer Empty interrupts disabled
1 An interrupt will be requested whenever the CBEIF ï¬ag is set (see Section 2.3.2.6)
Command Complete Interrupt Enable â The CCIE bit enables the interrupts in case of all commands being
completed in the Flash module.
0 Command Complete interrupts disabled
1 An interrupt will be requested whenever the CCIF ï¬ag is set (see Section 2.3.2.6)
Enable Security Key Writing.
0 Flash writes are interpreted as the start of a command write sequence
1 Writes to the Flash array are interpreted as a backdoor key while reads of the Flash array return invalid data
2.3.2.5 Flash Protection Register (FPROT)
The FPROT register deï¬nes which Flash sectors are protected against program or erase.
Module Base + 0x0004
7
R
FPOPEN
W
Reset
F
6
NV6
5
FPHDIS
4
FPHS1
3
FPHS0
2
FPLDIS
F
F
F
F
F
Figure 2-8. Flash Protection Register (FPROT)
1
FPLS1
F
0
FPLS0
F
The FPROT register is readable in normal and special modes. FPOPEN can only be written from a 1 to a 0.
FPLS[1:0] can be written anytime until FPLDIS is cleared. FPHS[1:0] can be written anytime until
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
93
|
▷ |