MC9S12E128 Datasheet, PDF (331/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
Table 11-2. PMFCFG0 Field Descriptions (continued)
Field
3
EDGEA
2
INDEPC
1
INDEPB
0
INDEPA
Description
Edge-Aligned or Center-Aligned PWM for Pair A — This bit determines whether PWM0 and PWM1 channels
will use edge-aligned or center-aligned waveforms. It determines waveforms for Pair B and Pair C if the MTG bit
is cleared. This bit cannot be modified after the WP bit is set.
0 PWM0 and PWM1 are center-aligned PWMs
1 PWM0 and PWM1 are edge-aligned PWMs
Independent or Complimentary Operation for Pair C — This bit determines if the PWM channels 4 and 5 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM4 and PWM5 are complementary PWM pair
1 PWM4 and PWM5 are independent PWMs
Independent or Complimentary Operation for Pair B — This bit determines if the PWM channels 2 and 3 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM2 and PWM3 are complementary PWM pair
1 PWM2 and PWM3 are independent PWMs
Independent or Complimentary Operation for Pair A — This bit determines if the PWM channels 0 and 1 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM0 and PWM1 are complementary PWM pair
1 PWM0 and PWM1 are independent PWMs
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
331