MC9S12E128 Datasheet, PDF (242/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 7 Digital-to-Analog Converter (DAC8B1CV1)
7.3.2.4 DAC Data Register — Right Justified (DACD)
Module Base + 0x0003
R
W
Reset
7
BIT 7
0
6
BIT 6
5
BIT 5
4
BIT 4
3
BIT 3
2
BIT 2
0
0
0
0
0
Figure 7-6. DAC Data Register — Right Justified (DACD)
1
BIT 1
0
0
BIT 0
0
Read: read zeroes when DJM is clear
Write: unimplemented when DJM is clear
The DAC data register is an 8-bit readable/writable register that stores the data to be converted when DJM
bit is set. When the DACE bit is set, the value in this register is converted into an analog voltage such that
values from $00 to $FF result in equal voltage increments from V_SSA to V_REF. When DJM bit is clear, this
register reads zeroes and cannot be written.
MC9S12E128 Data Sheet, Rev. 1.07
242
Freescale Semiconductor