MC9S12E128 Datasheet, PDF (333/606 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
11.3.2.3 PMF Configure 2 Register (PMFCFG2)
Module Base + 0x0002
7
R
0
W
6
5
4
3
2
0
MSK5
MSK4
MSK3
MSK2
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 11-6. PMF Configure 2 Register (PMFCFG2)
Read and write anytime.
1
MSK1
0
0
MSK0
0
Table 11-4. PMFCFG2 Field Descriptions
Field
Description
5–0
MSK[5:0]
Mask PWMx— Where x is 0, 1, 2, 3, 4, and 5.
0 PWMx is unmasked.
1 PWMx is masked and the channel is set to a value of 0 percent duty cycle.
Note: WARNING When using the TOPNEG/BOTNEG bits and the MSKx bits at the same time, when in
complementary mode, it is possible to have both pmf channel outputs of a channel pair set to one.
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
333