MC9S12H256VFVE Datasheet, PDF (91/130 Pages) Freescale Semiconductor, Inc – Original Release Date: 29 SEP 2000 Revised: 28 JUL 2008

MC9S12H256 Device User Guide — V01.20
greatest risk when the MCU is not consuming power; e.g. if no system clock is present, or if clock rate is
very low which would reduce overall power consumption.
A.1.5 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only. A functional operation under or outside those maxima
is not guaranteed. Stress beyond those limits may affect the reliability or cause permanent damage of the
device.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (e.g., either V_SS5 or V_DD5).
Table A-1 Absolute Maximum Ratings¹
Num
Rating
Symbol
Min
Max Unit
1 I/O, Regulator and Analog Supply Voltage
V_DD5
–0.3
6.0
V
2 _{Digital Logic Supply Voltage} ²
V_DD
–0.3
3.0
V
3 _{PLL Supply Voltage} ²
V_DDPLL
–0.3
3.0
V
4
Voltage difference VDDX1 to VDDX2 to VDDM and
VDDA
∆_VDDX
–0.3
0.3
V
5 Voltage difference VSSX to VSSR and VSSA
∆_VSSX
–0.3
0.3
V
6 Digital I/O Input Voltage
V_IN
–0.3
6.0
V
7 Analog Reference
V_RH, V_RL
–0.3
6.0
V
8 XFC, EXTAL, XTAL inputs
V_ILV
–0.3
3.0
V
9 TEST input
V_TEST
–0.3
10.0
V
Instantaneous Maximum Current
10 ^{Single pin limit for all digital I/O pins except PU, PV}
I_D
and PW ³
–25
+25
mA
Instantaneous Maximum Current
11 _{Single pin limit for Port PU, PV and PW 4}
I_D
–55
+55
mA
Instantaneous Maximum Current
12 _{Single pin limit for XFC, EXTAL, XTAL5}
I
DL
–25
+25
mA
Instantaneous Maximum Current
13 _{Single pin limit for TEST 6}
I_DT
–0.25
0
mA
14 Storage Temperature Range
T_stg
– 65
155
°C
NOTES:
1. Beyond absolute maximum ratings device might be damaged.
2. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply.
The absolute maximum ratings apply when the device is powered from an external source.
3. All digital I/O pins are internally clamped to V_SSX1/2 and V_DDX1/2, V_SSM and V_DDM or V_SSA and V_DDA.
4. Ports PU, PV, PW are internally clamped to V_SSM and V_DDM.
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