MC9S12H256VFVE Datasheet, PDF (69/130 Pages) Freescale Semiconductor, Inc – Original Release Date: 29 SEP 2000 Revised: 28 JUL 2008

MC9S12H256 Device User Guide — V01.20
Section 3 System Clock Description
3.1 Overview
The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules.
Figure 3-1 shows the clock connections from the CRG to all modules.
Consult the CRG Block User Guide for details on clock generation.
core clock
S12_CORE
EXTAL
XTAL
CRG
bus clock
oscillator clock
Flash
RAM
EEPROM
TIM
ATD
PWM
SCI0, SCI1
SPI
CAN0, CAN1
IIC
MC
LCD
PIM
Figure 3-1 Clock Connections
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