MC94MX21 Datasheet, PDF (9/98 Pages) Freescale Semiconductor, Inc – 333 and 350 MHz

Signal Name
NF_CLE
NF_CE
NF_WP
NF_ALE
NF_RE
NF_WE
NF_RB
NF_IO[15:0]
PC_A[25:0]
PC_D[15:0]
PC_CD1
PC_CD2
PC_WAIT
PC_READY
PC_RST
PC_OE
PC_WE
PC_VS1
PC_VS2
PC_BVD1
PC_BVD2
PC_SPKOUT
PC_REG
PC_CE1
PC_CE2
PC_IORD
PC_IOWR
PC_WP
PC_POE
PC_RW
PC_PWRON
Signal Descriptions
Table 2. i.MX21 Signal Descriptions (Continued)
Function/Notes
NAND Flash Controller
NAND Flash Command Latch Enable output signal. Multiplexed with PC_POE of PCMCIA.
NAND Flash Chip Enable output signal. This signal is multiplexed with PC_CE1 of PCMCIA.
NAND Flash Write Protect output signal. This signal is multiplexed with PC_CE2 of PCMCIA.
NAND Flash Address Latch Enable output signal. This signal is multiplexed with PC_OE of PCMCIA.
NAND Flash Read Enable output signal. This signal is multiplexed with PC_RW of PCMCIA.
NAND Flash Write Enable output signal. This signal is multiplexed with and PC_BVD2 of PCMCIA.
NAND Flash Ready Busy input signal. This signal is multiplexed with PC_RST of PCMCIA.
NAND Flash Data input and output signals. NF_IO[15:7] signals are multiplexed with A[25:21] and
A[15:13]. NF_IO[7:0] signals are multiplexed with several PCMCIA signals.
PCMCIA Controller
PCMCIA Address signals. These signals are multiplexed with A[25:0].
PCMCIA Data input and output signals. These signals are multiplexed with D[15:0].
PCMCIA Card Detect1 input signal. This signal is multiplexed with NFIO[7] signal of NF.
PCMCIA Card Detect2 input signal. This signal is multiplexed with NFIO[6] signal of NF.
PCMCIA Wait input signal to extend current access. This signal is multiplexed with NFIO[5] signal of NF.
PCMCIA Ready input signal indicates card is ready for access. Multiplexed with NFIO[4] signal of NF.
PCMCIA Reset output signal. This signal is multiplexed with NFRB signal of NF.
PCMCIA Memory Read Enable output signal asserted during common or attribute memory read cycles.
This signal is multiplexed with NFALE signal of NF.
PCMCIA Memory Write Enable output signal asserted during common or attribute memory cycles. This
signal is shared with RW of the EIM.
PCMCIA Voltage Sense1 input signal. This signal is multiplexed with NFIO[2] signal of NF.
PCMCIA Voltage Sense2 input signal. This signal is multiplexed with NFIO[1] signal of NF.
PCMCIA Battery Voltage Detect1 input signal. This signal is multiplexed with NFIO[0] signal of NF.
PCMCIA Battery Voltage Detect2 input signal. This signal is multiplexed with NF_WE signal of NF.
PCMCIA Speaker Out output signal. This signal is multiplexed with PWMO signal.
PCMCIA Register Select output signal. This signal is shared with EB2 of EIM.
PCMCIA Card Enable1 output signal. This signal is multiplexed with NFCE signal of NF.
PCMCIA Card Enable2 output signal. This signal is multiplexed with NFWP signal of NF.
PCMCIA IO Read output signal. This signal is shared with EB3 of EIM.
PCMCIA IO Write output signal. This signal is shared with OE signal of EIM.
PCMCIA Write Protect input signal. This signal is multiplexed with NFIO[3] signal of NF.
PCMCIA Output Enable signal to enable voltage translation buffers and transceivers. This signal is
multiplexed with NFCLE signal of NF.
PCMCIA Read Write output signal to control external transceiver direction. Asserted high for read
access and negated low for write access. This signal is multiplexed with NFRE signal of NF.
PCMCIA input signal to indicate that the card power has been applied and stabilized.
MC94MX21 Technical Data, Rev. 1.4
Freescale Semiconductor
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