MC94MX21 Datasheet, PDF (31/98 Pages) Freescale Semiconductor, Inc – 333 and 350 MHz

SCLK
XMAX
Specifications
LD _D320
D1 D2
D320
SPL_SPR
T1
T2
T3
T2
HSYN
T4
CLS
PS
T4
T5
T6
T7
T7
REV
Figure 21. Sharp TFT Panel Timing
Table 21. Sharp TFT Panel Timing
Symbol
Description
T1 SPL/SPR pulse width
T2 End of LD of line to beginning of HSYN
T3 End of HSYN to beginning of LD of line
T4 CLS rise delay from end of LD of line
T5 CLS pulse width
T6 PS rise delay from CLS negation
T7 REV toggle delay from last LD of line
Note:
•
•
•
Falling of SPL/SPR aligns with first LD of line.
Falling of PS aligns with rising edge of CLS.
REV toggles in every HSYN period.
Minimum
Value
Unit
–
1
Ts
1
HWAIT1+1
Ts
4
HWAIT2 + 4
Ts
3
CLS_RISE_DELAY+1
Ts
1
CLS_HI_WIDTH+1
Ts
0
PS_RISE_DELAY
Ts
1
REV_TOGGLE_DELAY+1
Ts
MC94MX21 Technical Data, Rev. 1.4
Freescale Semiconductor
31