33899 Datasheet, PDF (9/26 Pages) Freescale Semiconductor, Inc – Programmable H-Bridge Power IC

ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics at - 40°C ≤ T_A ≤ 125°C, 4.75V ≤ V_CC ≤ 5.25V, 6.0V ≤ V_IGNP ≤ 26.5V, unless otherwise noted. Typical values
reflect the approximate parameter means at T_A = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
PWM Frequency⁽⁸⁾
f _PWM
–
–
11
kHz
PWM / Output Duty Cycle Accuracy
OUT_ACC
%
Frequency = 10kHz, RS = 10kΩ, Slew Time = 1X, Duty cycle = 50%
-4.5
–
4.5
Short-circuit Filter (S0 and S1)
t _SCF
4.0
–
11
μs
Minimum PWM Low Pulse Width
PWM_MIN
–
–
0.2
μs
Low Side Comparator One Shot
Pulse Duration After a Low Side Comparator Trip
t _LSC
μs
5.0
–
10
Low Side Comparator Blank Time
Blanking Time After a Low Side Comparator Pulse⁽⁹⁾
t _LSCB
μs
5.0
–
10
Over-temperature Shutdown Filter (time before Die Temp bit is set)⁽⁸⁾
t _OTF
5.0
–
13.5
μs
Enable Lead Time⁽⁸⁾
t _LEAD
140
–
–
ns
Enable Lag Time⁽⁸⁾
t _LAG
50
–
–
ns
Delay Until Output Shuts OFF
t _SODLY
Short-circuit Detection or EN1 Falling or EN2 Falling Until H-Bridge Disables
–
μs
–
6.0
Delay Until Output Turns ON
EN1 rising or EN2 rising Until H-Bridge Enables
t _ENDLY
–
μs
–
5.0
Dead Timer⁽⁹⁾
t _DEAD
μs
Time Between High Side MOSFET and Low Side MOSFET Transition
1.0
–
3.0
Open Load Fault Delay
Duration of Fault Condition Until Fault Gets Latched In
t _FDO
μs
175
–
400
Over-voltage Shutdown Filter
Time from VIGNP > V_OV to MOSFET Output Disable
t _OVS
μs
100
–
200
Sleep Recovery Time⁽⁸⁾,⁽⁹⁾,⁽¹⁰⁾
t _SLEEP
–
150
–
μs
Slew Time S0 and S1⁽¹¹⁾
(Output Load = 5.0mH and 1.6Ω, 30% to 70%, V_IGNP = 14.5V)
Slew Mode = 1X
RS= 50kΩ
RS = 10kΩ, Short
Slew Mode = 2X
RS = 50kΩ
RS = 10kΩ, Short
Slew Mode = 4X
RS = 50kΩ
RS = 10kΩ, Short
S0 / S1_RS
1.6
0.2
2.8
0.5
5.0
1.2
μs
–
3.2
–
0.8
–
6.3
–
1.5
–
12.8
–
3.0
Notes
8. Design information
9. Guaranteed by characterization, not production tested.
10. Sleep recovery time is the time from EN going high until the outputs are ready to respond to input. This time is dependent on the recovery
time of V_CCL and V_{CCL_POR}. The recommended value for the V_CCL capacitor is designed to permit initialization of internal logic prior to
clearing of the POR condition (See + 3.3V Input (V_CCL) on page 12).
11. By design, if the RS input is left open, the slew time is the same as when shorted to GND. However, this is a high-impedance input and
will be susceptible to external noise sources unless terminated appropriately. It is highly recommended to terminate this pin with either
a ground or one of the program resistors .
Analog Integrated Circuit Device Data
Freescale Semiconductor
33899
9