33899 Datasheet, PDF (14/26 Pages) Freescale Semiconductor, Inc – Programmable H-Bridge Power IC

FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
LOAD CURRENT FEEDBACK (CSNS)
The load current sense circuit mirrors a sample of the load
current back to the microcontroller via the CSNS pin. It
supplies a current that is 1/400^th of the load current (see
Equation 1). An analog multiplexer routes the enabled high
side current to the CSNS pin. An external resistor connected
to the CSNS pin (R_CSNS) sets current to voltage gain. The
circuit operates properly in the presence of high-frequency
noise. An external capacitor may be necessary to provide
filtering.
V_CSNS =
I_OUT
400
. _RCSNS
Eq. 1
Note This output is clamped so that it will not exceed V_CC.
CHARGE PUMP RESERVOIR CAPACITOR (CRES)
The charge pump provides an output voltage over the full
operating VIGNP range that is sufficient to drive the output
MOSFETs and ensure that the output R_DS(ON) specifications
are met. An external reservoir capacitor of 0.1μF is
recommended. The charge pump operates at approximately
2.0MHz to 4.0MHz in order to prevent interference with AM
entertainment radio.
HIGH SIDE AND LOW SIDE SLEW TIME CONTROL
(RS)
The turn-on and the turn-off slew times on S0 and S1 (both
low and high side drive outputs) are adjustable from 5.0μs
(50kΩ RS) to 1.0μs (10kΩ RS) to reduce high-frequency
harmonic energy in the vehicle’s wiring harness. In addition,
slew time control is programmable to be either 1X, 2X, or 4X
(via the SPI) to lower power dissipation at elevated die
temperatures. The characteristics of the turn-on and turn-off
voltage are linear, with no discontinuities, during the output
driver state transitions. If the RS pin detects an impedance of
less than 5.0kΩ to ground or greater than 1.0MΩ to ground,
it defaults to the fastest slew time of 1.0μs.
LOW SIDE COMPARATOR ONE SHOT OUTPUT
(LSCMP)
The LSCMP output pin pulses high for 5μs to 10μs any
time the low side comparator is tripped. Then the output goes
low during a 5μs to 10μs blanking time. If another low side
comparator trip event is detected during the blanking time,
another 5μs to 10μs pulse high occurs immediately after the
blanking interval.
PWM
LSCmp
5 - 10μs
LS Current Comparator
I_load
5 - 10μs
> 40μs
5 - 10μs
Pulse Out
5 - 10μs
5 - 10μs
Blank Time Pulse Out
The REDIS min duration = 25μs,
so C_REDIS must be > 1nF
Figure 8. LS Current Comparator One Shot
AUTOMATIC OUTPUT RE-ENABLE DISABLE
(REDIS)
The REDIS input pin automatically re-enables the low side
MOSFET once the REDIS input voltage exceeds 4.0V. An
external capacitor (C_REDIS) determines the time interval (see
Equation 2). Once a low side current comparator is tripped, a
120μA current source linearly charges the capacitor until
either the next rising edge of PWM or the 4.0V trip level is
achieved. This re-enables the low side output MOSFET and
discharges the capacitor to 0V. This feature is disabled by
grounding this input.
C_REDIS ^. dv C ^. 4.0 V
dt =
=
I
120 μA
Eq. 2
As per the above equation, a 2.2nF capacitor will provide
a nominal 75μs time interval.
33899
14
Analog Integrated Circuit Device Data
Freescale Semiconductor