33899 Datasheet, PDF (16/26 Pages) Freescale Semiconductor, Inc – Programmable H-Bridge Power IC

FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
the input data from the DI input until CS eventually transitions
from a logic [0] to a logic [1].
The DO output pin is in a high-impedance condition unless
CS is low, at least one enable pin is high and VCC and VCCL
are within the normal operating range. When active, the
output is “rail to rail”, depending on the voltage at the VDDQ
pin.
SERIAL DATA INPUT (DI)
The DI input takes data from the microprocessor while CS
is asserted (low). The MSB is the first bit of each word
received on DI and the LSB is the last bit of each word
received on DI. The 33899 serially wraps around the DI input
bits to the DO output after the DO output transmits its fault
flag bits. The first 8 bits before CS goes high are latched into
the Control register. Any bytes transmitted before the last 8
bits are just wrapped around to the DO output and are not
used by the 33899 (see Figure 10).
This pin has TTL-level compatible input voltages, which
allow proper operation with microprocessors using a 3.3V to
5.0V supply.
CS ^CS*
DI/_DI/
S_SC_CL_LK_K
DODO
NNoottUUsseedd(1(1BByytete) )
DDI CI ConotnrtorloRl Regegisisteterr((11BByyttee))
FaulFt a/ Tuletm/TpemerpatDuaretaD(1atBay(t1e)Byte)
F1irsst tDDIIBByytete
Figure 10. SPI Operation with Extended CS
LOGIC OUT BIAS (VDDQ)
The VDDQ input pin provides the bias voltage for the data
out buffer and LS Comparator. It must be connected to the
same power supply that is used by the microprocessor’s SPI
I / O.
33899
16
Analog Integrated Circuit Device Data
Freescale Semiconductor