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33899 Datasheet, PDF (19/26 Pages) Freescale Semiconductor, Inc – Programmable H-Bridge Power IC
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Short-to-GND or Short-to-VIGNP Fault Filtering
The 33899 has a short-to-GND and short-to-VIGNP digital
fault filter. After a single fault occurrence, another 7 shorts
consecutive with PWM must be detected before the bit is
latched into the fault register.
Short to -1.0 V on Output Devices
The 33899 can survive a short to -1.0V through a 300mΩ
impedance (10kHz to 1000kHz) and a direct short to - 0.5V on
all I/Os that exit the module. A shorted output to these
voltages does not impact correct fault diagnostics for the
effected channel or any other normal operation of the 33899.
This feature applies to the SO and S1 outputs as well.
Loss of Module Ground
Loss of ground condition at the parts level denotes that all
pins of the 33899 see very low-impedance to ignition. In the
application, a loss of ground condition results in all I/O pins
floating to ignition voltage VIGNP, while all externally
referenced I/O pins are at worst case pulled to ground.
Loss of Module Ignition Supply
Loss of ignition condition at the parts level denotes that the
power input pins of the 33899 see infinite impedance to the
ignition supply voltage (depending on the application) but
there is some undefined impedance from these pins to
ground.
Output Driver Load(s)
The 33899 is capable of driving any PWM’ed inductive
load of up to 3.5A of continuous average current (at a
maximum frequency of 11kHz) with current feedback
capability. The 33899 drives ETC (Electronic Throttle
Control) motors. The typical characteristics of the ETC motor
are as follows:
•Resistance 1.25Ω to 2.4Ω (lumped resistance due to
actuator, harness, and connectors) over the
temperature range.
•Inductance 800μH at 1000Hz over the temperature
range.
Output Power Density
The die area for the output MOSFETs provides an
adequate thermal resistance to limit junction temperature to
150°C when the device is operated at 11kHz, 3.5A
continuous average current, and a 2.0ms nominal transition
time. This applies to FR4 PC board with a metal pedestal
under the device, which provides a thermal path to the case
of the module.
Output Synchronous Rectification Control
The 33899 uses synchronous rectification to reduce the
power dissipation during the recirculation period. In order to
prevent shoot-through current, the 33899 has a dead time
circuit that turns on the upper recirculation MOSFET after the
lower gate voltage falls below the threshold voltage and turns
it off before the lower gate voltage rises above the threshold
voltage.
Output Over-voltage Shutdown
The 33899 disables all MOSFET outputs when VIGNP is
above the over-voltage shutdown threshold for a time period
greater than t OVS (refer to Dynamic Electrical Characteristics
table, page 9).
Output Avalanche Protection
An inductive fly-back event, namely when the outputs are
suddenly disabled and VIGNP is lost, could result in electrical
overstress of the drivers. To prevent this the VIGNP input to
the 33899 should not exceed 40V during a fly-back condition.
A zener clamp and/or an appropriately valued capacitor are
common methods of limiting the transient.
Power-ON Reset (POR)
On power-up, the VCC and VCCL supplies to the 33899
typically increase to 5.0V and 3.3V, respectively, within
0.3ms to 3.0ms. The 33899 has power-ON reset (POR)
circuitry that monitors both the VCC and VCCL voltages.
When either voltage falls below its POR threshold, the S0 and
S1 outputs are driven to the inactive state. When both
voltages rise above the POR threshold, the outputs are
enabled. During POR none of the outputs momentarily glitch
ON. The contents of all SPI registers (both DI and DO) are
cleared on each power-ON reset cycle. See + 3.3V Input
(VCCL) on page 12 for part requirements to guarantee normal
operation.
Fault Detection
Open load detection is performed in the OFF state, and
short-circuit fault detection is performed while the H-Bridge
circuit(s) are enabled (see Figure 13, page 20). However, the
user can determine whether an open circuit has caused the
output current to go to 0A via the CSNS output. All valid faults
are latched into the SPI Fault register and cleared when a
logic [1] is written to the FLTCLR bit by the system
microprocessor (refer to Table 8, page 22).
Analog Integrated Circuit Device Data
Freescale Semiconductor
33899
19