MC9328MXL_06 Datasheet, PDF (81/90 Pages) Freescale Semiconductor, Inc – MX Family of applications processors

Functional Description and Application Information
1
VSYNC
7
HSYNC
PIXCLK
5
6
2
DATA[7:0]
Valid Data
Valid Data
Valid Data
3
4
Figure 63. Sensor Output Data on Pixel Clock Falling Edge
CSI Latches Data on Pixel Clock Rising Edge
1
VSYNC
7
HSYNC
PIXCLK
6
5
2
DATA[7:0]
Valid Data
Valid Data
Valid Data
3
4
Figure 64. Sensor Output Data on Pixel Clock Rising Edge
CSI Latches Data on Pixel Clock Falling Edge
Table 35. Gated Clock Mode Timing Parameters
Ref No.
1
2
3
4
5
6
7
Parameter
csi_vsync to csi_hsync
csi_hsync to csi_pixclk
csi_d setup time
csi_d hold time
csi_pixclk high time
csi_pixclk low time
csi_pixclk frequency
Min
Max
180
–
1
–
1
–
1
–
10.42
–
10.42
–
0
48
Unit
ns
ns
ns
ns
ns
ns
MHz
MC9328MXL Technical Data, Rev. 8
Freescale Semiconductor
81