K20P81M100SF2_1109 Datasheet, PDF (65/75 Pages) Freescale Semiconductor, Inc – K20 Sub-Family Data Sheet

Pinout
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
To find a package drawing, go to http://www.freescale.com and perform a keyword
search for the drawing’s document number:
If you want the drawing for this package
80-pin LQFP
81-pin MAPBGA
Then use this document number
98ASS23174W
98ASA00344D
8 Pinout
8.1 K20 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
NOTE
The 81-pin ballmap assignments are currently being developed.
The • in the entries in this package column indicate which
signals are present on the package.
81 80 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
MAP LQF
BGA P
E4 1 PTE0
ADC1_SE4 ADC1_SE4 PTE0
a
a
SPI1_PCS1 UART1_TX SDHC0_D1
I2C1_SDA
E3 2 PTE1
ADC1_SE5 ADC1_SE5 PTE1
a
a
SPI1_SOUT UART1_RX SDHC0_D0
I2C1_SCL
E2 3 PTE2
ADC1_SE6 ADC1_SE6 PTE2
a
a
SPI1_SCK UART1_CT SDHC0_DC
S_b
LK
F4 4 PTE3
ADC1_SE7 ADC1_SE7 PTE3
a
a
SPI1_SIN UART1_RT SDHC0_CM
S_b
D
E7 — VDD
VDD
VDD
F7 — VSS
VSS
VSS
H7 5 PTE4
DISABLED
PTE4
SPI1_PCS0 UART3_TX SDHC0_D3
G4 6 PTE5
DISABLED
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2
E6 7 VDD
VDD
VDD
G7 8 VSS
VSS
VSS
L6 — VSS
VSS
VSS
F1 9 USB0_DP USB0_DP USB0_DP
EzPort
K20 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
Freescale Semiconductor, Inc.
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