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K20P81M100SF2_1109 Datasheet, PDF (63/75 Pages) Freescale Semiconductor, Inc – K20 Sub-Family Data Sheet
Num
S11
S12
S13
S14
S15
S16
S17
S18
Peripheral operating requirements and behaviors
Table 46. I2S slave mode timing
Description
Operating voltage
I2S_BCLK cycle time (input)
I2S_BCLK pulse width high/low (input)
I2S_FS input setup before I2S_BCLK
I2S_FS input hold after I2S_BCLK
I2S_BCLK to I2S_TXD/I2S_FS output valid
I2S_BCLK to I2S_TXD/I2S_FS output invalid
I2S_RXD setup before I2S_BCLK
I2S_RXD hold after I2S_BCLK
Min.
2.7
8 x tSYS
45%
10
3
—
0
10
2
Max.
3.6
—
55%
—
—
20
—
—
—
Unit
V
ns
MCLK period
ns
ns
ns
ns
ns
ns
I2S_BCLK (input)
I2S_FS (output)
I2S_FS (input)
I2S_TXD
I2S_RXD
S11
S12
S15
S13
S15
S12
S15
S16
S17
S18
S16
S14
S16
Figure 26. I2S timing — slave modes
6.9 Human-machine interfaces (HMI)
6.9.1 TSI electrical specifications
Table 47. TSI electrical specifications
Symbol
VDDTSI
CELE
fREFmax
fELEmax
Description
Operating voltage
Target electrode capacitance range
Reference oscillator frequency
Electrode oscillator frequency
Min.
1.71
1
—
—
Typ.
—
20
5.5
0.5
Max.
3.6
500
12.7
4.0
Unit
V
pF
MHz
MHz
Notes
1
2
3
Table continues on the next page...
K20 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
Freescale Semiconductor, Inc.
63