K20P81M100SF2_1109 Datasheet, PDF (47/75 Pages) Freescale Semiconductor, Inc – K20 Sub-Family Data Sheet

6.6.1.4
Peripheral operating requirements and behaviors
16-bit ADC with PGA characteristics
Table 30. 16-bit ADC with PGA characteristics
Symbol
I_{DDA_PGA}
I_{DC_PGA}
Description
Supply current
Input DC current
Conditions
Low power
(ADC_PGA[PGALPb]=0)
Min.
Typ.¹
Max.
Unit
—
420
644
μA
A
Notes
2
3
G
Gain⁴
BW
PSRR
Input signal
bandwidth
Power supply
rejection ratio
Gain =1, V_REFPGA=1.2V,
V_CM=0.5V
Gain =64, V_REFPGA=1.2V,
V_CM=0.1V
• PGAG=0
• PGAG=1
• PGAG=2
• PGAG=3
• PGAG=4
• PGAG=5
• PGAG=6
• 16-bit modes
• < 16-bit modes
Gain=1
CMRR Common mode
rejection ratio
• Gain=1
• Gain=64
V_OFS
T_GSW
E_IL
Input offset
voltage
Gain switching
settling time
Input leakage
error
All modes
—
1.54
—
—
0.57
—
0.95
1
1.05
1.9
2
2.1
3.8
4
4.2
7.6
8
8.4
15.2
16
16.6
30.0
31.6
33.2
58.8
63.3
67.8
—
—
4
—
—
40
—
-84
—
—
-84
—
—
-85
—
—
0.2
—
—
—
10
I_In × R_AS
V_PP,DIFF
Maximum
differential input
signal swing
where V_X = V_REFPGA × 0.583
Table continues on the next page...
μA
μA
R_AS < 100Ω
kHz
kHz
dB
V_DDA= 3V
±100mV,
f_VDDA= 50Hz,
60Hz
dB
V_CM=
dB
500mVpp,
f_VCM= 50Hz,
100Hz
mV Output offset =
V_OFS*(Gain+1)
µs
5
mV
I_In = leakage
current
(refer to the
MCU's voltage
and current
operating
ratings)
V
6
K20 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
Freescale Semiconductor, Inc.
47