MC68HC05C9E Datasheet, PDF (59/106 Pages) Freescale Semiconductor, Inc – Microcontrollers

SCI I/O Registers
9.11.5 Baud Rate Register
The baud rate register (BAUD), shown in Figure 9-12, selects the baud rate for both the receiver and the
transmitter.
Address: $000D
Bit 7
Read:
Write:
Reset: —
6
5
4
3
2
SCP1
SCP0
SCR2
—
0
0
—
U
= Unimplemented
U = Unaffected
Figure 9-12. Baud Rate Register (BAUD)
1
SCR1
U
Bit 0
SCR0
U
SCP1 — SCP0–SCI Prescaler Select Bits
These read/write bits control prescaling of the baud rate generator clock, as shown in Table 9-1. Reset
clears both SCP1 and SCP0.
Table 9-1. Baud Rate Generator Clock Prescaling
SCP1 and SCP0
00
01
10
11
Baud Rate Generator Clock
Internal clock ÷ 1
Internal clock ÷ 3
Internal clock ÷ 4
Internal clock ÷ 13
SCR2 — SCR0–SCI Baud Rate Select Bits
These read/write bits select the SCI baud rate, as shown in Table 9-2. Resets have no effect on the
SCR2–SCR0 bits.
Table 9-2. Baud Rate Selection
SCR2, SCR1, and SCR0
000
001
010
011
100
101
110
111
SCI Baud Rate (Baud)
Prescaled clock ÷ 1
Prescaled clock ÷ 2
Prescaled clock ÷ 4
Prescaled clock ÷ 8
Prescaled clock ÷ 16
Prescaled clock ÷ 32
Prescaled clock ÷ 64
Prescaled clock ÷ 128
MC68HC05C9E Advance Information Data Sheet, Rev. 0.1
Freescale Semiconductor
59