MC68HC05C9E Datasheet, PDF (13/106 Pages) Freescale Semiconductor, Inc – Microcontrollers

Software-Programmable Options
1.4 Software-Programmable Options
The option register (OR), shown in Figure 1-2, contains the programmable bits for these options:
• Map two different areas of memory between RAM and ROM, one of 48 bytes and one of 128 bytes
• Edge-triggered only or edge- and level-triggered external interrupt (IRQ pin and any port B pin
configured for interrupt)
This register must be written to by user software during operation of the microcontroller.
Address:
Read:
Write:
Reset:
$3FDF
Bit 7
RAM0
0
6
5
4
3
2
0
0
0
0
RAM1
0
0
0
0
0
= Unimplemented
Figure 1-2. Option Register
1
Bit 0
0
IRQ
1
0
RAM0 — Random-Access Memory Control Bit 0
This read/write bit selects between RAM or ROM in location $0020 to $004F. This bit can be read or
written at any time.
1 = RAM selected
0 = ROM selected
RAM1— Random-Access Memory Control Bit 1
This read/write bit selects between RAM or ROM in location $0100 to $017F. This bit can be read or
written at any time.
1 = RAM selected
0 = EPROM selected
IRQ — Interrupt Request Bit
This bit selects between an edge-triggered only or edge- and level- triggered external interrupt. This
bit is set by reset, but can be cleared by software. This bit can be written only once.
1 = Edge and level interrupt option selected
0 = Edge-only interrupt option selected
1.5 Functional Pin Descriptions
Figure 1-3 and Figure 1-4 show the pin assignments for the available packages. A functional description
of the pins follows.
NOTE
A line over a signal name indicates an active low signal. For example,
RESET is active high and RESET is active low.
MC68HC05C9E Advance Information Data Sheet, Rev. 0.1
Freescale Semiconductor
13