MC9S12E64CFUE Datasheet, PDF (568/606 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix A Electrical Characteristics
Two cases with internal voltage regulator enabled and disabled must be considered:
1. Internal Voltage Regulator disabled
PINT = IDD ⋅ VDD + IDDPLL ⋅ VDDPLL + IDDA ⋅ VDDA
∑ ^{PIO =} _i ^{RDSON ⋅ IIOi2}
Which is the sum of all output currents on I/O ports associated with VDDX and VDDM.
For R_DSON is valid:
RDSON = -V-I--O-O----L-L--;for outputs driven low
respectively
RDSON = ^{V-----D----D----I-5-O----–}-H---V-----O-----H-- ;for outputs driven high
2. Internal voltage regulator enabled
PINT = IDDR ⋅ VDDR + IDDA ⋅ VDDA
I_DDR is the current shown in Table A-8 and not the overall current flowing into VDDR, which
additionally contains the current flowing into the external loads with output high.
∑ ^{PIO =} _i ^{RDSON ⋅ IIOi2}
Which is the sum of all output currents on I/O ports associated with VDDX and VDDR.
Table A-5. Thermal Package Characteristics¹
Num C
Rating
Symbol Min
1
T Thermal Resistance LQFP112, single sided PCB²
θ_JA
—
2
T Thermal Resistance LQFP112, double sided PCB
θ_JA
—
with 2 internal planes³
3
T Junction to Board LQFP112
4
T Junction to Case LQFP112
5
T Junction to Package Top LQFP112
6
T Thermal Resistance QFP 80, single sided PCB
7
T Thermal Resistance QFP 80, double sided PCB
with 2 internal planes
θ_JB
—
θ_JC
—
Ψ_JT
—
θ_JA
—
θ_JA
—
8
T Junction to Board QFP80
θ_JB
—
9
T Junction to Case QFP80
θ_JC
—
10
T Junction to Package Top QFP80
Ψ_JT
—
1 _{The values for thermal resistance are achieved by package simulations}
2 _{PC Board according to EIA/JEDEC Standard 51-3}
3 _{PC Board according to EIA/JEDEC Standard 51-7}
Typ
Max Unit
—
54
o_C/W
—
41
o_C/W
—
31
o_C/W
—
11
o_C/W
—
2
o_C/W
—
51
o_C/W
—
41
o_C/W
—
27
o_C/W
—
14
o_C/W
—
3
o_C/W
MC9S12E128 Data Sheet, Rev. 1.07
568
Freescale Semiconductor