MC9S12E64CFUE Datasheet, PDF (371/606 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
Setting the OUTCTLx bits do not disable the PWM generators and current status sensing circuitry. They
continue to run, but no longer control the output pins. When the OUTCTLx bits are cleared, the outputs of
the PWM generator become the inputs to the deadtime generators at the beginning of the next PWM cycle.
Software can drive the PWM outputs even when PWM enable bit (PWMEN) is set to zero.
NOTE
Avoid an unexpected deadtime insertion by clearing the OUTx bits before
setting and after clearing the OUTCTLx bits.
MODULUS = 4
PWM VALUE = 2
DEADTIME = 2
PWM0
PWM1
PWM0 WITH DEADTIME
PWM1 WITH DEADTIME
OUTCTL0
OUT0
OUT1
PWM0
PWM1
Figure 11-62. Setting OUT0 with OUTCTL Set in Complementary Mode
MC9S12E128 Data Sheet, Rev. 1.07
Freescale Semiconductor
371