K11P121M50SF4 Datasheet, PDF (53/59 Pages) Freescale Semiconductor, Inc – K11 Sub-Family Data Sheet

K12, K21, and K22 devices and are not present on K10 and
K20 devices.
• The TRACE signals on PTE0, PTE1, PTE2, PTE3, and
PTE4 are available only for K11, K12, K21, and K22
devices and are not present on K10 and K20 devices.
• If the VBAT pin is not used, the VBAT pin should be left
floating. Do not connect VBAT pin to VSS.
• The FTM_CLKIN signals on PTB16 and PTB17 are
available only for K11, K12, K21, and K22 devices and are
not present on K10 and K20 devices. For K11D devices
this signal is on ALT7, and for K11F devices, this signal is
on ALT4.
• Ball A10, which is PTE19 on K11D and K21D devices, is
not available on K11F and K21F devices.
121 Default
MAP
BGA
E4 ADC0_SE10
E3 ADC0_SE11
E2 ADC0_DP1
F4 ADC0_DM1
H7 DISABLED
G4 DISABLED
E6 VDD
G7 VSS
K3 ADC0_SE4a
H4 ADC0_SE5a
A11 ADC0_SE6a
A10 ADC0_SE7a
L6 VSS
K1 ADC0_DP0
K2 ADC0_DM0
L1 ADC0_DP3
L2 ADC0_DM3
F5 VDDA
G5 VREFH
G6 VREFL
F6 VSSA
L3 VREF_OUT/
CMP1_IN5/
CMP0_IN5
ALT0
ADC0_SE10
ADC0_SE11
ADC0_DP1
ADC0_DM1
VDD
VSS
ADC0_SE4a
ADC0_SE5a
ADC0_SE6a
ADC0_SE7a
VSS
ADC0_DP0
ADC0_DM0
ADC0_DP3
ADC0_DM3
VDDA
VREFH
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5
ALT1
PTE0
PTE1/
LLWU_P0
PTE2/
LLWU_P1
PTE3
PTE4/
LLWU_P2
PTE5
PTE16
PTE17
PTE18
PTE19
ALT2
SPI1_PCS1
SPI1_SOUT
SPI1_SCK
SPI1_SIN
SPI1_PCS0
SPI1_PCS2
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
SPI0_SIN
ALT3
ALT4
ALT5
ALT6
ALT7
UART1_TX
UART1_RX
UART1_CTS_b
UART1_RTS_b
UART3_TX
UART3_RX
TRACE_CLKOUT I2C1_SDA
TRACE_D3 I2C1_SCL
TRACE_D2
TRACE_D1
TRACE_D0
RTC_CLKOUT
SPI1_SIN
SPI1_SOUT
UART2_TX
UART2_RX
UART2_CTS_b
UART2_RTS_b
FTM_CLKIN0
FTM_CLKIN1
I2C0_SDA
I2C0_SCL
FTM0_FLT3
LPTMR0_ALT3
K11 Sub-Family Data Sheet Data Sheet, Rev. 3, 08/2012.
Freescale Semiconductor, Inc.
Pinout
EzPort
53