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PXN20 Datasheet, PDF (39/60 Pages) Freescale Semiconductor, Inc – PXN20 Microcontroller
Electrical characteristics
2 The maximum frequency value is with frequency modulation disabled. If frequency modulation is enabled, the maximum
frequency value should be de-rated by the percentage of modulation enabled so that the maximum frequency is not exceeded.
3 “Loss of Reference Frequency” is the reference frequency detected internally, which transitions the PLL into self clocked mode.
4 This specification applies to the period required for the PLL to re-lock after changing the MFD frequency control bits in the
synthesizer control register (SYNCR). From power up with crystal oscillator reference, lock time will be additive with crystal
startup time.
5 Values are with frequency modulation disabled. If frequency modulation is enabled, jitter is the sum of Cjitter + Cmod.
6 Modulation depth selected must not result in fPLL value greater than the fPLL maximum specified value.
7 Maximum and minimum variations from programmed modulation depth are 2%, 3%, and 4% peak-to-peak. Use only these
settings.
8 Depth tolerance is the programmed modulation depth ±0.25% of fSYS.
9 See the Block Guide for VCO frequency synthesis equations.
10 Modulation rates less than 400 kHz will result in exceedingly long FM calibration durations. Modulation rates greater than
1 MHz will result in reduced calibration accuracy.
4.11 ADC electrical characteristics
Table 20. ADC conversion specifications (operating)
Spec
Characteristic
Symbol
Min
Max
Unit
1 Analog High Reference Voltage
2 Analog Low Reference Voltage
3 Analog Input Voltage
4 Sampling Frequency
5 Maximum ADC Clock Frequency
6 Sampling Time
VDDA = 3.0 V – 3.6 V
VDDA > 3.6 V – 5.5 V
7 Differential Non Linearity
VRH
VRL
AVIN
FS
FMAX
tS
DNL
VDDA – 0.5
0
VRL
—
—
250
125
–1.0
VDDA
0.5
VRH
1.53
60
—
1.0
V
V
V
MHz
MHz
ns
LSB
8 Integral Non Linearity
INL
–1.5
1.5
LSB
9 Offset Error
OFS
–1.0
1.0
LSB
10 Gain Error
GNE
–2.0
2.0
LSB
11 Total Unadjusted Error 1
TUE
–2.0
2.0
LSB
1 TUE assumes no pin activity on pins adjacent to analog channel or output driver activity on corresponding VDDE segment.
4.12 Flash memory electrical characteristics
Table 21. Flash program and erase specifications1
Spec
Characteristic
1 Double Word (64 bits) Program Time4
2 Page (128 bits and 256 bits) Program Time4
3 16 KB Block Pre-program and Erase Time
4 64 KB Block Pre-program and Erase Time
5 128 KB Block Pre-program and Erase Time
Symbol
Min
Initial
Max2
tdwprogram — —
tpprogram — 160
t16kpperase — 1000
t64kpperase — 1800
t128kpperase — 2600
Max3
500
500
5000
5000
7500
Unit
s
s
ms
ms
ms
PXN20 Microcontroller Data Sheet, Rev. 1
Freescale Semiconductor
39