MC68HC912D60 Datasheet, PDF (383/432 Pages) Freescale Semiconductor, Inc – M68HC12 Microcontrollers

Freescale Semiconductor, Inc.
Electrical Specifications
Tables of Data
Table 20-15. SPI Timing
Num
(V_DD = 5.0 Vdc ±10%, V_SS = 0 Vdc, T_A = T_L to T_H , 200 pF load on all SPI pins)⁽¹⁾
Function
Symbol
Min
Max
Operating Frequency
Master
Slave
f_op
1/256
1/2
1/256
1/2
SCK Period
1 Master
Slave
t_sck
2
256
2
—
Enable Lead Time
2 Master
Slave
t_lead
1/2
—
1
—
Enable Lag Time
3 Master
Slave
t_lag
1/2
—
1
—
Clock (SCK) High or Low Time
4 Master
Slave
t_wsck
t_cyc − 30
t_cyc − 30
128 t_cyc
—
Sequential Transfer Delay
5 Master
Slave
t_td
1/2
—
1
—
Data Setup Time (Inputs)
6 Master
Slave
t_su
30
—
30
—
Data Hold Time (Inputs)
7 Master
Slave
t_hi
0
—
30
—
8 Slave Access Time
9 Slave MISO Disable Time
Data Valid (after SCK Edge)
10 Master
Slave
t_a
—
1
t_dis
—
1
t_v
—
50
—
50
Data Hold Time (Outputs)
11 Master
Slave
t_ho
0
—
0
—
Rise Time
12 Input
Output
t_ri
—
t_cyc − 30
t_ro
—
30
Fall Time
13 Input
Output
t_fi
—
t_cyc − 30
t_fo
—
30
1. All AC timing is shown with respect to 20% V_DD and 70% V_DD levels unless otherwise noted.
Unit
f_eclk
t_cyc
t_cyc
t_sck
t_cyc
t_sck
t_cyc
ns
ns
t_sck
t_cyc
ns
ns
ns
ns
t_cyc
t_cyc
ns
ns
ns
ns
ns
ns
ns
ns
68HC(9)12D60 — Rev 4.0
MOTOROLA
Electrical Specifications
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