MC68HC912D60 Datasheet, PDF (170/432 Pages) Freescale Semiconductor, Inc – M68HC12 Microcontrollers

Clock Functions
Freescale Semiconductor, Inc.
the transition, the clock select output will be held low and all CPU activity
will cease until the transition is complete.
The Module Clock Select bit MCS determines the clock used by the ECT
module and the baud rate generators of the SCIs. In limp-home mode,
the output of MCS is forced to 0, but the MCS bit reads the latched value.
It allows normal operation of the serial and timer subsystems at a fixed
reference frequency while allowing the CPU to operate at a higher,
variable frequency.
XCLK
MCLK
÷ 2048
REGISTER: RTICTL
BIT:RTBYP
÷4
REGISTER: RTICTL
0:0:0 REGISTER: COPCTL 0:0:0
BITS: RTR2, RTR1, RTR0
BITS: CR2, CR1, CR0
0:0:1
0:0:1
÷2
0:1:0
÷4
0:1:0
SC0BD
MODULUS DIVIDER:
÷ 1, 2, 3, 4, 5, 6,...,8190, 8191
SCI0
÷2
RECEIVE
BAUD RATE (16x)
÷ 16
÷2
SCI0
TRANSMIT
BAUD RATE (1x)
÷2
SC1BD
MODULUS DIVIDER:
÷ 1, 2, 3, 4, 5, 6,...,8190, 8191
SCI1
RECEIVE
÷2
BAUD RATE (16x)
÷ 16
SCI1
÷2
TRANSMIT
BAUD RATE (1x)
0:1:1
÷4
1:0:0
÷4
1:0:1
÷4
1:1:0
÷2
1:1:1
÷2
TO RTI
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
TO COP
Figure 12-7. Clock Chain for SCI0, SCI1, RTI, COP
Advance Information
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Clock Functions
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68HC(9)12D60 — Rev 4.0
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