33910 Datasheet, PDF (30/44 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with 2x60mA High Side Drivers

FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
short to V_BAT), the transmitter will not be shut down. The bit
LINOC in the LIN status register (LINSR) is set.
If the bit LINM is set in the interrupt mask register (IMR) an
Interrupt IRQ will be generated.
Over-Temperature Shutdown (LIN Interrupt)
The output low side FET is protected against over-
temperature conditions. In case of an over-temperature
condition, the transmitter will be shut down and the bit LINOT
in the LIN status register (LINSR) is set.
If the bit LINM is set in the interrupt mask register (IMR) an
Interrupt IRQ will be generated.
The transmitter is automatically re-enabled once the
condition is gone and TXD is high.
A read of the LIN status register (LINSR) with the TXD pin
will re-enable the transmitter.
RXD Short Circuit Detection (LIN Interrupt)
The LIN transceiver has a short-circuit detection for the
RXD output pin. In case of an short-circuit condition, either 5V
or ground, the bit RXSHORT in the LIN status register
(LINSR) is set and the transmitter is shutdown.
If the bit LINM is set in the interrupt mask register (IMR) an
interrupt IRQ will be generated.
The transmitter is automatically re-enabled once the
condition is gone (transition on RXD) and TXD is high.
A read of the LIN status register (LINSR) without the RXD
pin short circuit condition will clear the bit RXSHORT.
TXD Dominant Detection (LIN Interrupt)
The LIN transceiver monitors the TXD input pin to detect
stuck in dominant (0V) condition. In case of a stuck condition
(TXD pin 0V for more than 1 second (typ.)) the transmitter is
shut down and the bit TXDOM in the LIN status register
(LINSR) is set.
If the bit LINM is set in the interrupt mask register (IMR) an
interrupt IRQ will be generated.
The transmitter is automatically re-enabled once TXD is
high.
A read of the LIN status register (LINSR) with the TXD pin
is high will clear the bit TXDOM.
LIN Dominant Voltage Level Selection
The LIN dominant voltage level can be selected by the bit
LDVS in the LIN control register (LINCR).
LIN Receiver Operation Only
While in Normal Mode the activation of the RXONLY bit
disables the LIN TX driver. In the case of a LIN error condition
this bit is automatically set. In case a Low Power Mode is
selected with this bit set, the LIN wake-up functionality is
disabled, then, in Stop Mode, the RXD pin will reflect the state
of the LIN bus.
STOP Mode And Wake-up Feature
During Stop Mode operation the transmitter of the physical
layer is disabled. In case the bit LIN-PU was set in the Stop
Mode sequence the internal pull-up resistor is disconnected
from VSUP and a small current source keeps the LIN pin in
the recessive state. The receiver is still active and able to
detect wake-up events on the LIN bus line.
A dominant level longer than t_PROPWL followed by a rising
edge will generate a wake-up interrupt and will be reported in
the ISR. Also see Figure 11, page 19.
SLEEP Mode And Wake-up Feature
During Sleep Mode operation the transmitter of the
physical layer is disabled. In case the bit LIN-PU was set in
the Sleep Mode sequence the internal pull-up resistor is
disconnected from V_SUP and a small current source keeps
the LIN pin in recessive state. The receiver is still active to be
able to detect wake-up events on the LIN bus line.
A dominant level longer than t_PROPWL followed by a rising
edge will generate a system wake-up (Reset) and will be
reported in the ISR. Also see Figure 10, page 18.
33910
30
Analog Integrated Circuit Device Data
Freescale Semiconductor