33910 Datasheet, PDF (3/44 Pages) Freescale Semiconductor, Inc – LIN System Basis Chip with 2x60mA High Side Drivers

PIN CONNECTIONS
PIN CONNECTIONS
RXD 1
TXD 2
MISO 3
MOSI 4
SCLK 5
CS 6
ADOUT0 7
PWMIN 8
* Special Configuration Recommended /
Mandatory for Marked NC Pins
24 HS2
23 L1
22 NC*
21 NC*
20 NC*
19 NC*
18 PGND
17 NC*
Figure 3. 33910 Pin Connections
Table 1. 33910 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 20.
Pin
Pin Name
Formal Name
Definition
This pin is the receiver output of the LIN interface which reports the state of
1
RXD
Receiver Output
the bus voltage to the MCU interface.
This pin is the transmitter input of the LIN interface which controls the state of
2
TXD
Transmitter Input
the bus output.
3
MISO
SPI Output
SPI data output. When CS is high, the pin is in the high-impedance state.
4
MOSI
SPI Input
SPI data input.
5
SCLK
SPI Clock
SPI clock Input.
6
CS
SPI Chip Select
SPI chip select input pin. CS is active low.
7
ADOUT0
Analog Output Pin 0 Analog multiplexer output.
8
PWMIN
PWM Input
High side pulse width modulation input.
Bidirectional reset I/O pin - driven low when any internal reset source is
9
RST
Internal Reset I/O _{asserted. RST is active low.}
10
IRQ
Internal Interrupt
Output
Interrupt output pin, indicating wake-up events from Stop Mode or events from
Normal and Normal Request Modes. IRQ is active low.
11, 15-17,
19-22, 28
NC
No connect
Analog Integrated Circuit Device Data
Freescale Semiconductor
33910
3