33874 Datasheet, PDF (25/37 Pages) Freescale Semiconductor, Inc – Quad High-Side Switch (Quad 35 mΩ)

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 16. Serial Output Bit Map Description
Previous STATR
SO Returned Data
SO SO SO SO SO OD
A4 A3 A2 A1 A0 15
OD
14
OD
13
OD
12
OD
11
OD
10
OD9 OD8 OD7 OD6 OD5 OD4
OD3
OD2
OD1 OD0
START
_s
A₁
A₀
0
0
0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3
ST2 ST1
ST0
OTF_s
OCHF_s OCLF_s OLF_s
OCR0 0 0 0 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 IN3_SPI
IN2_SPI IN1_SPI IN0_SPI
OCR1 0 1 0 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 CSNS3 EN CSNS2 EN CSNS1 EN CSNS0 EN
SOCHL
R_s
A₁
A₀
0
1
0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3
ST2 ST1
ST0
SOCH_s
SOCL2_s SOCL1_s SOCL0_s
CDTOL
R_s
A₁
A₀
0
1
1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3
ST2 ST1
ST0
OL_DIS_s
OCL_DIS_s OCLT1_s OCLT0_s
DICR_s A₁ A₀ 1 0 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 Fast_SR_s CSNS_high_s DIR_DIS_s A/O_s
UOVR 0 0 1 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 OT_latch_1 OT_latch_0 UV_DIS OV_DIS
WDR 0 1 1 0 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
0
WDTO
WD1
WD0
PINR0 0 0 1 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 HS2_failsafe HS0_failsafe WD_en WAKE
PINR1 0 1 1 1 0 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0
IN3
IN2
IN1
IN0
PINR2 0 1 1 1 1 WDIN UVF OVF SOA4 SOA3 SOA2 SOA1 SOA0 ST3 ST2 ST1 ST0 OT_latch_3 OT_latch_2
X
X
RESET N/A N/A N/A N/A N/A 0 0 0 0 0 0 0 0 0 0 0 0
0
s = Output selection with the bits A₁A₀ as defined in Table 10, page 22.
ID[1,0]: product identification
0
0
0
PREVIOUS ADDRESS SOA4 : SOA0 = A₁A₀000
Bits OD3 : OD0 reflect the current state of the Fault register
(FLTR) corresponding to the output previously selected with
the bits A₁A₀ (Table 17).
Table 17. Output-Specific Fault Register
OD3
OD2
OD1
OTF_s
OCHF_s
s = Selection of the output.
OCLF_s
OD0
OLF_s
Note The FS pin reports all faults. For latched faults, this
pin is reset by a new Switch OFF command (via SPI or direct
input IN).
PREVIOUS ADDRESS SOA4 : SOA0 = 00001
Data in bits OD3:OD0 contains IN3_SPI:IN0_SPI
programmed bits for outputs HS3 : HS0, respectively.
PREVIOUS ADDRESS SOA4 : SOA0 = 01001
Data in bits OD3:OD0 contains the programmed
CSNS3 EN : CSNS0 EN bits for outputs HS3 : HS0,
respectively.
PREVIOUS ADDRESS SOA4 : SOA0 = A₁A₀010
Data returned in bits OD3 : OD0 are programmed current
values for the overcurrent high detection level (refer to
Table 12, page 22) and the overcurrent low detection level
(refer to Table 11, page 22), corresponding to the output
previously selected with A₁A₀.
PREVIOUS ADDRESS SOA4 : SOA0= A₁A₀011
The returned data contains the programmed values in the
CDTOLR register for the output selected with A₁A₀.
PREVIOUS ADDRESS SOA4 : SOA0 = A₁A₀100
The returned data contains the programmed values in the
DICR register for the output selected with A₁A₀.
PREVIOUS ADDRESS SOA4 : SOA0 = 00101
The returned data contains the programmed values in the
UOVR register.
PREVIOUS ADDRESS SOA4 : SOA0 = 01101
The returned data contains the programmed values in the
WDR register. Bit OD2 (WDTO) reflects the status of the
Analog Integrated Circuit Device Data
Freescale Semiconductor
33874
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