33874 Datasheet, PDF (20/37 Pages) Freescale Semiconductor, Inc – Quad High-Side Switch (Quad 35 mΩ)

FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
Table 7. Device behavior in case of Undervoltage
Quad High-Side
Switch
(VPWR Battery
Voltage) ∗∗
State
UV Enable
IN[0:3]=0
(Falling VPWR)
UV Enable
IN[0:3]=0
(Rising VPWR)
UV Enable
IN_x***=1
(Falling VPWR)
UV Enable
IN_x***=1
(Rising VPWR)
UV Disable
IN[0:3]=0
(Falling or
Rising VPWR)
UV Disable
IN_x***=1
(Falling or
Rising VPWR)
VPWR > VPWRUV Output State
OFF
OFF
ON
OFF
OFF
ON
FS State
1
1
1
0
1
1
SPI Fault Register
UVF Bit
0
1 until next read
0
1
0 (falling)
0 (falling)
1 until next 1 until next
read (rising) read (rising)
VPWRUV > VPWR Output State
> UVPOR
FS State
OFF
OFF
OFF
OFF
OFF
ON
0
0
0
0
1
1
SPI Fault Register
1
1
1
1
1
1
UVF Bit
UVPOR > VPWR > Output State
2.5 V ∗
FS State
OFF
OFF
OFF
OFF
OFF
ON
1
1
1
1
1
1
SPI Fault Register 1 until next read 1 until next read 1 until next read 1 until next read 1 until next read 1 until next read
UVF Bit
2.5 V > VPWR > 0V Output State
OFF
OFF
OFF
OFF
OFF
OFF
FS State
1
1
1
1
1
1
SPI Fault Register 1 until next read 1 until next read 1 until next read 1 until next read 1 until next read 1 until next read
UVF Bit
Comments
UV fault is
not latched
UV fault is
not latched
UV fault
is latched
∗ = Typical value; not guaranteed
∗∗ = While V_DD remains within specified range.
*** = IN_x is equivalent to IN_x direct input or IN_spi_s SPI input.
OPEN LOAD FAULT (NON-LATCHING)
The 33874 incorporates open load detection circuitry on
the output. Output open load fault (OLF) is detected and
reported as a fault condition when the output is disabled
(OFF). The open load fault is detected and latched into the
status register after the internal gate voltage is pulled low
enough to turn OFF the output. The OLF fault bit is set in the
status register. If the open load fault is removed, the status
register will be cleared after reading the register.
The open load protection can be disabled through SPI
(bit OL_DIS). It is recommended to disable open load
circuitry in case of a permanent disconnected load.
REVERSE BATTERY
The output survives the application of reverse voltage as
low as -16 V. Under these conditions, the output’s gate is
enhanced to keep the junction temperature less than 150°C.
The ON resistance of the output is fairly similar to that in the
Normal mode. No additional passive components are
required except on VDD.
GROUND DISCONNECT PROTECTION
In the event the 33874 ground is disconnected from load
ground, the device protects itself and safely turns OFF the
output regardless of the state of the output at the time of
disconnection. A 10K resistor needs to be added between the
wake pin and the rest of the circuitry in order to ensure that
the device turns off in case of ground disconnect and to
prevent this pin to exceed its maximum ratings.
Current limit resistors in the digital input lines protect the
digital supply against excessive current (10kΩ typical).
33874
20
Analog Integrated Circuit Device Data
Freescale Semiconductor