MC9S08DN60 Datasheet, PDF (173/354 Pages) Freescale Semiconductor, Inc – Microcontrollers

ADCH
01000
01001
01010
01011
01100
01101
01110
01111
Chapter 10 Analog-to-Digital Converter (S08ADC12V1)
Figure 10-4. Input Channel Select (continued)
Input Select
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
ADCH
11000
11001
11010
11011
11100
11101
11110
11111
Input Select
AD24
AD25
AD26
AD27
Reserved
V_REFH
V_REFL
Module disabled
10.3.2 Status and Control Register 2 (ADCSC2)
The ADCSC2 register is used to control the compare function, conversion trigger and conversion active of
the ADC module.
7
6
5
4
3
R ADACT
0
ADTRG
ACFE
ACFGT
W
Reset:
0
0
0
0
0
= Unimplemented or Reserved
1 _{Bits 1 and 0 are reserved bits that must always be written to 0.}
2
1
0
0
R¹
R¹
0
0
0
Figure 10-5. Status and Control Register 2 (ADCSC2)
Table 10-4. ADCSC2 Register Field Descriptions
Field
7
ADACT
6
ADTRG
Description
Conversion Active — ADACT indicates that a conversion is in progress. ADACT is set when a conversion is
initiated and cleared when a conversion is completed or aborted.
0 Conversion not in progress
1 Conversion in progress
Conversion Trigger Select — ADTRG is used to select the type of trigger to be used for initiating a conversion.
Two types of trigger are selectable: software trigger and hardware trigger. When software trigger is selected, a
conversion is initiated following a write to ADCSC1. When hardware trigger is selected, a conversion is initiated
following the assertion of the ADHWT input.
0 Software trigger selected
1 Hardware trigger selected
MC9S08DN60 Series Data Sheet, Rev 2
Freescale Semiconductor
173